Activity

  • hmp42 replied to the topic Design Verification & Validation in the forum Introduction to Design Controls 8 years, 5 months ago

    As per my understanding, Validation is concerned with making sure that the system meets the customer’s actual needs, while verification is concerned with whether the system is well-engineered, error-free, and so on. Verification will help to determine whether the software is of high quality, but it will not ensure that the system is useful at customer’s end.

    To make it clearer, Verification can be seen like theoretical step. During making of any device, there must be design inputs and resulting outputs. To verify such, all the verification activities that are performed must meet these conditions.Whereas, Validation is performed to make sure that all user needs are met and that the device can meet its’ intended use. Validation is a more specialized and specific. This process is more technical and it involves all kinds of tests to make sure all requirements are met that were set forth by the design inputs.

    -Hetal