Hi aashutosh it’s a good question to ask verification is something that you carry out to test weather your output meats your input requirement. Whereas your validation is where you check if your output meets user requirement. So for example in a current to voltage converter circuit verification would be if you put in 3 amp of current do you really get 6V output as specified in product specification. Where as validation is something in which you would check if user really needs 6v as output or if user needs can be resolved in voltage less than 6V output. So in a nut shell verification is you input something and check if thats what you are really looking for and validation is something in which you check if that’s what user is also looking for.